This invention relates to an integrated circuit (IC) semiconductor device, more particularly, an activatable conductive link disposed between electrically insulated metallic conductive wirings formed in an IC to provide a conducting path between the wirings in accordance with a requirement.
An activatable conducting link is disposed between conductive wirings which are insulated from each other. The link is initially electrically insulative, and can be converted to conductive, at any time required, by the application of an activating operation thereto.
The activatable conducting links are frequently used in cooperation with fuses in IC devices such as programable read only memories, gate arrays and the like, which are fabricated in a master slicing system. In these ICs, in accordance with a customers order, circuit blocks previously formed therein are selectively connected to each other or disconnected from each other using the conductive links or fuses which are activated (put in operation) by the irradiation of an energy beam, usually a laser beam.
Meanwhile, as the degree of integration of ICs grows, the necessity for redundancy within IC chips increases in order to enhance production yield of the device. Redundancy is implemented by providing an IC, such as a memory chip, with spare circuitry, such as spare rows or spare columns for memory cells which are tested after the final fabrication step thereof is finished. Thereafter, bad circuitries are selectively rejected by disconnecting the relevant wirings by blowing the previously formed relevant fuses, and are replaced by spare circuitries by activating the relevant conductive links previously formed. For example, one of the above-described techniques is reported by James B. Binton on page 39 to 40 of Electronics, July 28, 1981, wherein conductive pathways (links) of metal-silicon alloy are selectively activated by the irradiation of an argon laser beam between metal layers.
One prior art activatable conductive link currently being used is described in relation with a master slicing system of a semiconductor device, wherein basic circuits are formed on a semiconductor substrate in advance, and thereafter, a combined whole circuit of various types is formed in response to a customer's order, by only selectively changing the interconnecting wirings between the basic circuits. FIG. 1 is a cross-sectional view, illustrating a prior art conductive link for changing an interconnecting wiring. Of the reference numerals, 1 denotes a silicon substrate, 2 denotes a silicon dioxide (SiO.sub.2) layer formed on the silicon substrate 1, 3 denotes a phospho-silicate-glass (PSG) layer formed as an insulating layer interposed between the associated layers, 4 denotes an activatable conducting element made of polycrystaline silicon (polysilicon), and 5 denotes an aluminum layer. The portions 4a of polysilicon of the activatable conducting element 4 which contact the aluminum layer 5, are highly doped with phosphorous dopants, having a low electrical resistance, but the center portion 4b of the element 4 is non-doped, resulting in a highly resistive element. It is assumed that in order to set up a required whole circuit system, the polysilicon element 4 is required to be changed to be conductive. With the prior art technology, the element 4 is irradiated by a laser beam having a continuous wavelength. As a result, phosphorus dopants contained in the high doped portions 4a of the element 4 are diffused into the non-doped portion 4b, changing the non-doped portion 4b into a conductive portion, thus activating the element 4 to be conductive.
In view of high integration packing density of the IC, the area for conductive links or fuses on the chip, is required to be as small as possible. The above-described activatable conductive element 4 occupies a considerable area on the substrate 1, leading to a low integration density of the semiconductor device, and requires a complicated fabrication procedure. Therefore, there is a need for conductive links which occupy smaller areas on a IC chip.